Webinar Alert: ESD Design for High Speed Interfaces: Signal Integrity Considerations (Part 2)

By Nxp Semiconductors, PRNE
Sunday, January 24, 2010

SAN JOSE, California, January 25 - NXP Semiconductors announces the following TechOnline Webinar:

    What:    NXP Semiconductors Live Webinar

    When:    Tuesday, February 2, 2010 at 9:00 am PST, 12:00 pm EST, and
             17:00 GMT.

    Where:
    seminar2.techonline.com/registration/distrib.cgi?s=1506&d=3474

    How:     Live over the Internet -- Simply log on to the web at the
             address above.

    Contact: Rebecca Samuel, Media Relations, NXP Semiconductors,
             +1-408-474-8769

In Part 1 of this two part series, we focused on ESD techniques for
ensuring adequate levels of protection for high speed interfaces. In Part 2,
we turn our attention to maintaining signal integrity when placing ESD
devices on high speed differential signals. Topics covered in this session
include: Capacitance, inductance, and methods of impedance matching,
maintaining eye openings, and minimizing jitter and skew. During this live
webinar, we will compare signal integrity challenges with different ESD
solutions.

If you are unable to participate during the live webcast, the event will
be archived at
seminar2.techonline.com/registration/distrib.cgi?s=1506&d=3474.

NXP is a leading semiconductor company founded by Philips more than 50
years ago. Headquartered in Europe, the company has about 29,000 employees
working in more than 30 countries and posted sales of USD 5.4 billion
(including the Mobile & Personal business) in 2008. NXP creates
semiconductors, system solutions and software that deliver better sensory
experiences in TVs, set-top boxes, identification applications, mobile
phones, cars and a wide range of other electronic devices. News from NXP is
located at www.nxp.com.

Rebecca Samuel, Media Relations, NXP Semiconductors, +1-408-474-8769

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